This lab course is offered to provide the student with the practical skills required to design and implement an FPGA. The student will design commonly used FPGA structures such as state machines and data processing elements and learn how to include library components such as FIFOs, memory interfaces and computer/debug interfaces. The student will work through all phases of development: coding, simulation, building and testing the FPGA on hardware. This course will consist of seven 2-hour labs, each requiring either completion of a worksheet or a detailed report of the results.
Co-req: EECE.5750 FPGA Logic Design Techniques.