ETEC.3420 Logic Design II and Laboratory (Formerly 17.342)

Description

This course studies synchronous sequential circuits and register transfer logic. Latches and flip-flops. Registers. Counters. Analysis and design of synchronous sequential circuits. Moore model and Mealy model. Two's complement arithmetic. Algorithmic state machine (ASM) chart. One-hot state assignment. Register transfer logic. Data-path and control circuit. Design of a simple arithmetic processor.

Course prerequisites/corequisites are determined by the faculty and approved by the curriculum committees. Students are required to fulfill these requirements prior to enrollment. For courses offered through online or GPS delivery, students are responsible for confirming with the instructor or department that all enrollment requirements have been satisfied before registering.