Parag Kurlawala

Graduate Student

Phone: 978-934-3827

B. E., (Electronics and Telecommunication Engineering), University of Mumbai 2006
M.S., Electrical Engineering, University of Massachusetts, Lowell Expected: 2008

Modeling and designing the conventional FETs and quantum well based transistors using ATLAS™ software from Silvaco

Studying the property of transistors with gate width of 0.05痠 to understand the effect of their electrical fields and the trans-conductance of the device

Parag Kurlawala is a graduate student in the Electrical and Computer Engineering Department at UMass Lowell with a specialization in solid state electronics and VLSI. He has been on the AETC team as a graduate trainee since spring, 2007 and as a graduate research assistant since the fall of 2007.

He is the vice-president of the Graduate Indian Student Association at UMass Lowell and the vice-president of the UML Cricket Club.



Parag Kurlawala Graduate Student Phone: 978-934-3827 Email: Parag Kurlawala's Email Educational Background B. E., (Electronics and Telecommunication Engineering), University of Mumbai 2006 M.S., Electrical Engineering, University of Massachusetts, Lowell Expected: 2008 Scholarly Interests Modeling and designing the conventional FETs and quantum well based transistors using ATLAS™ software from Silvaco Studying the property of transistors with gate width of 0.05痠 to understand the effect of their electrical fields and the trans-conductance of the device Bio Sketch Parag Kurlawala is a graduate student in the Electrical and Computer Engineering Department at UMass Lowell with a specialization in solid state electronics and VLSI. He has been on the AETC team as a graduate trainee since spring, 2007 and as a graduate research assistant since the fall of 2007. He is the vice-president of the Graduate Indian Student Association at UMass Lowell and the vice-president of the UML Cricket Club.

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